Physical Design Engineer - 2nm/3nm/5nm, Innovus & TCL
quest globalSan Jose, CA
Physical Design Engineer - 2nm/3nm/5nm, Innovus & TCL
quest globalSan Jose, CASenior L5
Semiconductor and Related Device ManufacturingPrinted Circuit Assembly (Electronic Assembly) ManufacturingEngineering Services
APPLY NOWQuest Global is seeking an experienced Physical Design Engineer to lead floorplanning, power planning, CTS, and routing for cutting-edge nodes. You will write TCL scripts to optimize standard cell placement and clock trees, and collaborate with RTL/DFT teams to ensure STA/IR/EM/LVS/DRC targets are met.
The ideal candidate has 8+ years in physical design, strong Cadence Innovus/Atop experience, Calibre LVS/DRC proficiency, and solid TCL/Python scripting skills.
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Level
Senior L5
Location
San Jose, CA
Occupation
Electronics Engineers, Except Computer
Industry
Semiconductor and Related Device Manufacturing
Posted
3 days ago