Cisco Silicon One is seeking a seasoned Signal and Power Integrity Technical Leader to guide the packaging SI/PI team in defining, designing, and validating high-performance ASIC packages. You will partner with layout and system teams to ensure optimal SI/PI across interposer, substrate, and PCB while mentoring junior engineers. The role requires deep expertise in 56G PAM4, high-speed SerDes, and advanced packaging techniques, with a track record of successful tape-outs and strong collaboration

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Level

Lead L6

Salary

$214,000 - $310,000 per year

Location

San Jose, CA

Occupation

Telecommunications Engineering Specialists

Industry

Semiconductor and Related Device Manufacturing

Posted

2 days ago

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