Skip to main content

Senior ASIC Failure Analysis Engineer

anysiliconSan Jose, CALead L6
Cisco is seeking a Failure Analysis Engineer in San Jose, California, to join the Quality and Reliability group. The hybrid role involves three days in the office and focuses on failure analysis of ASIC products, with close interaction across product, test, and design teams. The ideal candidate has extensive semiconductor FA experience and a passion for problem solving, with expertise in cross-section, X-ray, CSAM, TDR, FIB, SEM, TEM, IR/EMMI/OBIRCH techniques.
APPLY NOW (opens in a new tab)

Matching similar jobs

Level

Lead L6

Location

San Jose, CA

Occupation

Computer Systems Analysts

Industry

Semiconductor and Related Device Manufacturing

Posted

today

APPLY NOW (opens in a new tab)