Senior Silicon Validation Engineer FPGA IP & Testing
lattice semiconductorSan Jose, CA
Senior Silicon Validation Engineer FPGA IP & Testing
lattice semiconductorSan Jose, CASenior L5
Semiconductor and Related Device ManufacturingElectronic Computer ManufacturingSemiconductor Machinery Manufacturing
APPLY NOW (opens in a new tab)Lattice Semiconductor is seeking a seasoned Silicon Design Validation Engineer to drive IP validation from silicon arrival to production release in a fast-paced environment. You will work with SerDes, memory interfaces, and IP blocks, developing robust validation plans and RTL test logic while collaborating across design, verification, and manufacturing teams. The role demands deep expertise in high-speed design, Verilog/VHDL, FPGA development tools, and automation using Python or similar
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Level
Senior L5
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
today