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Micron Technology, Inc. in the United States is seeking an experienced engineer to design and optimize TSV interface circuits that connect memory die to logic die, including Rx/Tx channels and timing margin analysis. You will develop TSV models, define constraints for datapath interfaces, and ensure signal and power integrity across a highly parallel bus, with collaboration across process technology and DTCO teams.

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Level

Lead L6

Location

San Jose, CA

Occupation

Microsystems Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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