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SoC Verification Engineer (SystemVerilog/UVM)
$162,000 - $317,000 per year
APPLY (opens in a new tab)$162,000 - $317,000 per year
Level
Junior L3
Salary
$162,000 - $317,000 per year
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
2 days ago