Principal Post-Silicon Validation Engineer: AI Connectivity
astera labsSan Jose, CA
Principal Post-Silicon Validation Engineer: AI Connectivity
astera labsSan Jose, CALead L6
Research and Development in the Physical, Engineering, and Life SciencesComputer Systems Design ServicesComputer Terminal and Other Computer Peripheral Equipment Manufacturing
APPLY NOW (opens in a new tab)Astera Labs in San Jose, CA is seeking a Principal Post-Silicon Validation Engineer to lead the validation strategy for high-speed interconnect products. You will drive lab bring-up, characterize silicon, and perform root-cause analysis, influencing production readiness and time-to-market for AI infrastructure solutions.
Responsibilities include designing test plans, enabling automation with Python and C/C++, mentoring engineers, and collaborating with design and product teams to ensure robust
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Level
Lead L6
Location
San Jose, CA
Occupation
Validation Engineers
Industry
Research and Development in the Physical, Engineering, and Life Sciences
Posted
yesterday