Principal DVT Engineer – Post-Silicon for AI DSPs
celero communicationsIrvine, CA
$180,000 - $240,000 per year
APPLYPrincipal DVT Engineer – Post-Silicon for AI DSPs
celero communicationsIrvine, CALead L6
$180,000 - $240,000 per year
Semiconductor and Related Device ManufacturingResearch and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)Radio and Television Broadcasting and Wireless Communications Equipment Manufacturing
APPLY NOWCelero Communications, Inc. in Irvine, CA is seeking a Principal Design Validation & Test (DVT) Engineer to lead post-silicon validation for next-generation coherent DSP ASICs powering AI and hyperscale optical networking.
You will drive silicon characterization and readiness for customer deployment. You will collaborate across Architecture, RTL, Firmware, Systems and Customers, shaping validation strategy, building automation frameworks in Python, and ensuring production-ready validation
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Level
Lead L6
Salary
$180,000 - $240,000 per year
Location
Irvine, CA
Occupation
Validation Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
2 days ago