Senior Analog Layout Engineer 2nm/5nm LDO/ADC/SERDES

Progile Tech, Inc. seeks an Analog Layout Engineer for a long-term onsite contract in the Bay Area, CA. The role requires deep experience in advanced node processes and high-speed layout strategies. Ideal candidates have 8+ years in analog layout, with hands-on work on LDO, ADC and SERDES blocks, and a track record delivering reliable silicon layouts in 2/3/5nm nodes. This is a mid-senior level contract position based onsite in Sunnyvale/San Jose area.