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Altera Corporation in the San Jose area seeks a Principal NoC IP Micro-Architect to lead end-to-end architecture, microarchitecture, RTL design and technical leadership of NoC IPs for next-generation FPGA platforms. You will collaborate with architecture, design, verification, software, physical design and product teams to deliver high-performance interconnect solutions optimized for power, performance, area, and reliability.

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Level

Manager L7

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

today

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