SK hynix America seeks a Director of Buffer & Memory Subsystem Architecture to lead HW/SW co-design for next-generation HBF-xPU systems in San Jose, CA. You will translate AI workload traces into architectural policies for caching, prefetching, and data movement, with a focus on memory controllers and performance modeling. You will own architecture decisions, interface contracts, and system-level efficiency across hardware and software, driving latency and bandwidth improvements.

Matching similar jobs

Level

Manager L7

Salary

$250,000 - $300,000 per year

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

2 days ago

APPLY NOW