Design (Integration) EngineerLocation: Orange County, CA / Bay Area, CA (Onsite)
Duration: Contract / Full timeJob Description:
Responsibilities:
Responsible for RTL Design and Integration of complex digital IPs and ASICs Define micro-architecture specifications, technical proposals, logic design and RTLAssist verification team in developing Test plan and test coverageReview coverage reports from regression tests and provide feedback to verification teamAssist physical design team in floorplan and static timing (Repeater / retiming register placement/configuration) Performs logic design, Register Transfer Level RTL coding, and drives emulation to make sure quality of the IPInteract and participate in discussion with customer on IP integration and reviewsRequirements/QualificationsHands on Experience with designing complex IP and SoCExperience in AXI, DDR4, HBM, PCIe design is requiredExperience in design Clock Controllers, Reset controllers, DFT logic, Mailboxes at SoC LevelExperience in top level integration of Pads, Pin Muxes, BScan, OTP, Memory Fuse LogicARM Coresight configurationARM/Arteries/Soniwall NoC ConfigurationUPF generation and Interface cell placement for multi-Voltage designs.
