The Advanced Imager Technology Group develops imaging platforms that enable impactful national security capabilities and scientific discovery. From fundamental device research to developing camera technology for fielded systems, our group covers the full technology development spectrum from concept to prototype. Research areas include novel imager and detector design with in-house silicon and compound semiconductor microfabrication facilities, leading-edge integrated circuit design, and advanced packaging and 3D integration capabilities. Examples of our technology include large-format focal planes, high-speed imagers, time-of-arrival detectors (LADAR receivers), and low-light-level imagers. The group's efforts span the range of device and materials development, integrated circuit design and fabrication, custom packaging, detector hybridization, and the development of control and readout electronics for system-level demonstrations.
Job Description:
The Advanced Imager Technology Group is seeking to hire a Technical Staff member to develop next generation readout integrated circuit architectures as part of the group's portfolio of imager technology. Current research areas include designs in advanced technology nodes (< 32 nm) and on-chip digital processing and reconfigurable logic. The position requires broad knowledge of integrated design techniques and tools from concept development and modeling to physical implementation and tapeout. The candidate will be a member of a design team and must value teamwork, collaboration, and creative thinking. The design team fits within a larger vertically integrated team whose goal is to develop imaging systems for a wide variety of applications. The successful applicant must have a growth mindset with an expectation for continuous improvement of self and others through shared learning.
Requirements:- Candidates should have a deep expertise in at least two of the following areas: Digital IC design
- Industry standard IC design flows (Cadence, Mentor, Synopsys)HDL programming and simulation
- Synthesis and Place and Route
- Functional verification
- Timing analysis techniques
- Scripting (Python, Perl)
- FinFET and multi-gate transistor design techniques
- Advanced process design kits (PDKs) for sub-22nm nodes
- Multi-patterning and litho-friendly design practices
- Power management and leakage mitigation in advanced nodes
- Signal integrity and parasitic extraction for nanoscale designs
- Design for manufacturability (DFM) at advanced technology nodes
- Low-power design techniques (power gating, dynamic voltage/frequency scaling)
Candidates should hold a Ph.D. in Electrical Engineering, Computer Engineering, or a related field. In lieu of a PhD, candidates with a MS degree and 5+ years of experience will be considered.
Preferred
ExperienceExperience in more than two of the technical skills above as well as the following: Full custom design
Physical verification
Familiarity with imaging systems or digital signal processing is desirable. Recent Graduate Hiring Range: $145,200 - $170,000 Experienced Hiring Range: $145,200 - $220,000 Disclaimer: MIT Lincoln Laboratory provides a typical hiring range as a good faith estimate of what we reasonably expect to offer for this position at the time of posting. The final salary offered to a selected candidate will depend on various factors, including—but not limited to—the scope and responsibilities of the role, the candidate's experience, skills and education/training, internal equity considerations and applicable legal requirements. This range reflects base salary only and does not include additional forms of compensation or benefits.
At MIT Lincoln Laboratory, our exceptional career opportunities include many outstanding benefits to help you stay healthy, feel supported, and enjoy a fulfilling work-life balance. Benefits offered to employees include: Comprehensive health, dental, and vision plans MIT-funded pension Matching 401K Paid leave (including vacation, sick, parental, military, etc.) Tuition reimbursement and continuing education programs Mentorship programs A range of work-life balance options ... and much more! Please visit our Benefits page for more information.
As an employee of MIT, you can also take advantage of other voluntary benefits, discounts and perks. Selected candidate will be subject to a pre-employment background investigation and must be able to obtain and maintain a Secret level DoD security clearance. MIT Lincoln Laboratory is an Equal Employment Opportunity (EEO) employer. All qualified applicants will receive consideration for employment and will not be discriminated against on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, veteran status, disability status, or genetic information; U.S. citizenship is required.
Requisition ID: 42931
