Skip to main content
HP is seeking an experienced Senior ASIC/SoC Design Engineer in Vancouver, WA to lead blocks of digital ASICs from design to silicon verification. You will partner with internal and external teams to align on specifications, drive reviews, and advance RA roadmaps for inkjet and laserjet architectures. Candidates should have a BS/MS in EE and 8–10 years in ASIC/SOC design, with deep knowledge of submicron tech, RTL-to-silicon flows, and strong EDA tool proficiency. Relocation offered.

Matching similar jobs

Level

Lead L6

Location

Vancouver, WA

Occupation

Electronics Engineers, Except Computer

Industry

Semiconductor and Related Device Manufacturing

Posted

today

APPLY NOW (opens in a new tab)