Ambiqis on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.
Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.
Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.
We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.
At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve.
If that's you, join us — the intelligence everywhere revolution starts here.
Ambiq develops ultra-low-power semiconductor solutions that enable intelligent, battery-powered devices. We are seeking a Senior Staff Analog IC Design Engineer to lead the definition and development of critical analog and mixed-signal subsystems across our product portfolio.
This is a hands‑on senior technical role with influence extending beyond a single circuit or project. You will help establish subsystem specifications and architectures, design the highest‑risk circuits, guide implementation and validation, and serve as a technical resource to experienced engineers across the organization.
The position is onsite five days per week in NW Austin, Texas.
Role Impact
Your work will directly affect power consumption, performance, reliability, manufacturability, and customer success. You will help Ambiq translate product requirements into production‑ready analog subsystems in advanced process technologies, including 22nm, 12nm, and future nodes.
Responsibilities:
Lead block‑and chip‑level specification development for related analog subsystems.
Define circuit architectures for power management, clocking, data‑conversion, or comparable mixed‑signal functions.
Perform transistor‑level design and verification for complex, high‑risk analog blocks.
Conduct or technically supervise layout, extraction, and post‑layout closure.
Lead design reviews and resolve cross‑block technical issues.
Define robust analog/digital interfaces in partnership with architecture, RTL, and verification teams.
Guide Staff and Senior engineers through technical reviews and day‑to‑day design decisions.
Develop prototype‑silicon validation and characterization strategies.
Define manufacturing test requirements and support efficient test‑program development.
Work with product, test, applications, and marketing teams on product definition, production issues, and complex customer problems.
Drive designs from initial requirements through production release.
Qualifications:
BSor MSin Electrical Engineering, Computer Engineering, or related field.
Demonstrated ownership of complex analog subsystems from specification through production.
At least 8 years of experience in analog or mixed‑signal IC design with multiple completed silicon design cycles.
Deep transistor‑level design and verification expertise in at least one relevant area, such as power management, clocking, or data converters.
Strong understanding of analog layout, parasitics, matching, noise, variation, reliability, and advanced‑node design constraints.
Experience with post‑silicon bring‑up, characterization, debug, and manufacturing test.
Ability to lead architecture and design decisions across teams without relying on formal authority.
Effective collaboration with digital, physical‑design, product, test, applications, and systems teams.
Experience mentoring senior engineers and improving the quality of design reviews.
Current authorization to work in the United States for any employer.
Must be willing to come into an office in NW Austin 5 days a week.
Preferred Qualifications:
Ultra‑low‑power, battery‑constrained, or subthreshold circuit‑design experience.
Design experience at 22nm or below.
Breadth across PMU, clocking, and data‑converter subsystems.
Experience supporting multiple products or concurrent tapeouts.
Familiarity with MCU, wearable, medical, edge‑AI, wireless, or sensor‑oriented SoCs.
Why Ambiq
Ambiq offers the opportunity to solve unusually difficult power‑efficiency problems while remaining close to the circuits. This role provides meaningful architectural influence, ownership throughout the complete silicon lifecycle, and the ability to shape both products and the analog team’s technical growth.
Voluntary Self-Identification
For government reporting purposes, we ask candidates to respond to the below self‑identification survey. Completion of the form is entirely voluntary. Whatever your decision, it will not be considered in the hiringprocess or thereafter. Any information that you do provide will be recorded and maintained in aconfidential file.
As set forth in Ambiq Micro, Inc.'s Equal Employment Opportunity policy, we do not discriminate on the basis of any protected group status under any applicable law.
If you believe you belong to any of the categories of protected veterans listed below, please indicate by making the appropriate selection. As a government contractor subject to the Vietnam Era Veterans Readjustment Assistance Act (VEVRAA), we request this information in order to measurethe effectiveness of the outreach and positive recruitment efforts we undertake pursuant to VEVRAA. Classification of protected categoriesis as follows:
A "disabled veteran" is one of the following: a veteran of the U.S. military, ground, naval or air service who is entitled to compensation (or who but for the receipt of military retired pay would be entitled to compensation) under laws administered by the Secretary of Veterans Affairs; or a person who was discharged or released from active duty because of a service‑connected disability.
A "recently separated veteran" means any veteran during the three‑year period beginning on the date of such veteran's discharge or release from active duty in the U.S. military, ground, naval, or air service.
An "active duty wartime or campaign badge veteran" means a veteran who served on active duty in the U.S. military, ground, naval or air service during a war, or in a campaign or expedition for which a campaign badge has been authorized under the laws administered by the Department of Defense.
An "Armed forces service medal veteran" means a veteran who, while serving on active duty in the U.S. military, ground, naval or air service, participated in a United States military operation for which an Armed Forces service medal was awarded pursuant to Executive Order 12985.
