Astera Labs is seeking a Principal Digital Design Engineer in the United States to lead front-end circuit design, RTL, and verification for high‑performance network controllers. You will own architecture‑to‑GDSII delivery and work with teams to meet tight timing on advanced CMOS processes. The role requires hands‑on experience with PCIe, ULink, Esun, Ethernet, and strong front‑end design, verification, and test expertise. UVM familiarity and US work authorization are preferred.

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Level

Lead L6

Salary

$185,000 - $240,000 per year

Location

Brooklyn, NY

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

2 days ago

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