Senior Physical Design Engineer - High-Speed ASICs (5nm/3nm)
lumilensSan Jose, CA
Senior Physical Design Engineer - High-Speed ASICs (5nm/3nm)
lumilensSan Jose, CASenior L5
Semiconductor and Related Device ManufacturingResearch and Development in the Physical, Engineering, and Life SciencesOther Electronic Component Manufacturing
APPLY NOW (opens in a new tab)Lumilens is seeking a Senior Physical Design Engineer to join our silicon design team, developing high‐performance ASICs on 5nm and 3nm TSMC nodes. You will own physical implementation from RTL to GDSII and drive timing and power closure for ultra‐high‐speed designs. Collaborate with RTL, STA, IP, and verification teams to solve advanced implementation challenges. Proficiency in floorplanning, placement, CTS, routing, and RC extraction is essential, along with scripting skills in Tcl or Python
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Level
Senior L5
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
today