Persimmons, Inc. in San Jose, CA, seeks a Silicon Design Engineer to deliver high-quality RTL drops to PD partners and drive SoC implementation from RTL to tape-out.
You will collaborate with architecture, software, and design teams to meet performance, power, and area targets, while building automated design flows and leveraging AI tools to accelerate iterations. You will bring 3+ years in RTL-to-PD work, strong SystemVerilog skills, and experience with Cadence or Synopsys toolchains.
