Senior Memory PHY Architect for High-Speed Interfaces

AMD is seeking a seasoned Memory PHY Design Engineer to shape digital PHY architecture, RTL, and firmware for LPDDR and DDR technologies. You will collaborate with analog, circuit, verification, firmware, physical design, and system teams to improve power, performance, and area across programs. You will lead the Memory PHY digital architecture from concept to RTL, with responsibilities spanning synthesis, timing, and post‑silicon support.