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Synopsys, Inc. is seeking a senior post-silicon validation engineer to own the die-to-die IP verification for UCIe interfaces. You will lead the evaluation and sign-off of silicon readiness, coordinating across analog, digital, and packaging teams to resolve complex issues. You will develop and maintain validation frameworks in Python, manage lab automation, and drive cross-function programs focused on silicon quality and data integrity.

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Level

Lead L6

Location

Hillsboro, IL

Occupation

Validation Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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