Physical Design Engineer

Experience: 10+ years (Relevant) What candidate will Be Doing: Netlist to-GDSII implementation, including top-level floorplanning, design partitioning, top-level block-to-block/over-the-block routing, repeater flops and balance flop concepts, top-level clock structure planning, clock network SPICE simulation, power mesh planning, and full signoff (DRC, LVS, STA, EMIR). Own and drive PnR execution and closure at both block and top levels, addressing timing, congestion, IR-drop, and physical verification challenges.

What we are looking for: A bachelor’s degree in electrical or computer engineering, accompanied by a minimum of 8 years of experience in ASIC or a related field, or a master’s degree in electrical or computer engineering with at least 8 years of experience in ASIC or related discipline. Proficient with industry-standard tools: Synopsys ICC2, Fusion Compiler and scripting in Tcl, Perl, Python for automation and flow development. Expertise in clock gating, logic optimization, and integration of high-speed interfaces like DDR and PCIe. Collaborate cross-functionally with RTL, STA, DFT, verification, and packaging teams to ensure smooth integration and closure. Manage comprehensive signoff processes, including STA (PrimeTime SI), EM/IR analysis (RedHawk), and physical verification (Calibre); handle ECOs and DRC/LVS clean-up. Provide technical leadership, mentor junior engineers, and contribute to successful tape outs at advanced technology nodes (5nm and 3nm).

What’s In It for You: At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive financial compensation, including various compensation plans and a solid benefits package. 401k, With Matching Contributions Short-Term/Long-Term Disability Insurance Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options Tuition Reimbursement And more!

Education: Bachelor's Degree

Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.

Location: San Jose, USA About eInfochips: eInfochips, an Arrow company (Fortune #133), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow’s $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries & verticals.

EEO Statement: Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy). Seniority level Mid-Senior level Employment type Full-time Job function Design Industries Design Services