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Qualcomm Technologies, Inc. is seeking an experienced engineer to lead pre-silicon verification for digital power IPs. You will craft test benches, develop coverage and assertions, and apply formal verification techniques to ensure robust designs. The role requires strong SystemVerilog/UVM background, ASIC design/verification experience, and collaboration within the ASICS Engineering group in California. Relocation and benefits are provided as part of Qualcomm's compensation package.

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Level

Lead L6

Location

San Diego, CA

Occupation

Validation Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

2 days ago

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