Efficient Computer seeks a Senior Design Engineer to design, integrate, and sign off RTL for blocks across our power-efficient SoC, focusing on on-chip interconnect and memory interfaces, low-power logic, and peripheral IP. You will collaborate with architects, DV, physical design, and firmware to tape out a leading ultra-low-power fabric.
This unique role joins a growing HW engineering team moving from initial product development to market release and scaled production.
