Senior ASIC DFT Verification Engineer (IP/SoC)

Meta is hiring an ASIC Design Verification Engineer specializing in DFT within the Infrastructure Silicon organization. We are looking for experienced engineers to develop and verify DFT architectures for custom ASICs and SoC designs powering Meta's data center infrastructure. You will drive DFT verification closure across IP, sub-system, and SoC levels, ensuring silicon manufacturability, testability, and quality for first-pass success. Collaboration with multiple teams is essential.