Lead ASIC DFT & DV Engineer
ciscoSan Jose, CA
Lead ASIC DFT & DV Engineer
ciscoSan Jose, CALead L6
Computer Hardware EngineersComputer Systems Engineers/ArchitectsElectronics Engineers, Except Computer
Semiconductor and Related Device ManufacturingResearch and Development in the Physical, Engineering, and Life SciencesComputer Systems Design Services
APPLY NOW (opens in a new tab)Cisco Systems, Inc. in San Jose, CA is seeking a DFT Verification Lead within the Silicon One team. This hybrid role requires three days per week on-site at Cisco's San Jose location and involves test planning, test bench development, and DFT architecture to support ATE screening and in-system test.
You will collaborate with Front-end RTL and backend PD teams, driving high-quality DFT verification and debugging with minimal mentorship. Strong SystemVerilog and scripting skills are essential.
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Level
Lead L6
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
3 days ago