Senior NVM Design Engineer Analog Compute-In-Memory

Mythic in Palo Alto seeks a senior IC designer for NVM memory circuits. You will design and verify IP macros, participate in NVM architecture, and collaborate with back-end teams to qualify silicon. The role requires 5–10+ years in EE with hands-on NVM design, Python and Verilog modeling, and strong CAD tool fluency. A Ph.D. or MS in EE is preferred. Compensation ranges from $170,000 to $240,000 per year with benefits.