Lead Digital ASIC Architect - Chip Design Leader

Draper Labs in Cambridge, MA seeks a Senior Digital ASIC Architect to lead the design of digital ICs from concept to delivery. You will develop architectural concepts, model and simulate, and collaborate with analog and digital designers to optimize tradeoffs. You will guide chip-level planning, drive SOC design decisions, mentor engineers, deliver technical solutions to customers, and contribute to verification, test planning, and documentation.