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FPGA IP Software Engineer – HW/SW Co-Design & Acceleration

alteraSan Jose, CALead L6
Altera is seeking an FPGA IP Software Development Engineer in San Jose to design, integrate, and debug FPGA-based systems for embedded networking and acceleration projects, including PCIe, HPS, EMIF, and Ethernet IPs. You will collaborate with hardware and software teams on HW/SW co-design, board bring-up, and development of software abstractions and drivers to enable FPGA acceleration in SmartNICs and ARM-based FPGA systems.
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Level

Lead L6

Location

San Jose, CA

Occupation

Software Developers

Industry

Electronic Computer Manufacturing

Posted

yesterday

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