ASIC Design Engineer
western digitalSan Jose, CA
Western Digital Corporation in California seeks the most senior technical individual contributor in memory design. Owns end-to-end product architecture from concept through silicon qualification, arbitrate the power/performance/area trade-offs, and is the final technical authority across design, process and product engineering. Define memory subsystem architecture, drive floorplan and physical architecture, manage multi-generation roadmap, and coordinate cross-functional trade-offs with process,
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Level
Lead L6
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
today